EPF10K30ETC144-1 vs EPF10K30ATI144-2 Comparación
Comparación detallada lado a lado de EPF10K30ETC144-1 por Altera y EPF10K30ATI144-2 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPF10K30ETC144-1 | EPF10K30ATI144-2 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $22,40 | $21,95 |
| Family | FLEX 10KE | FLEX 10K Embedded Programmable Logic Family |
| Device Logic Elements | 1,728 LEs | — |
| Typical Gates | 30,000 gates | — |
| Maximum User I/O | 102 pins | — |
| Logic Array Blocks (LABs) | 216 | — |
| Embedded Array Blocks (EABs) | 6 | 12 |
| Total Embedded RAM | 12,288 bits | — |
| Core Voltage | 5.0 V | 5.0 V |
| Temperatura de funcionamiento | 0C to +70C (Commercial) | -40 °C to +85 °C (industrial, 'I' suffix) |
| Encapsulado | 144-LQFP (LFQFP), 22x22 mm, 0.5 mm pitch | 144-pin TQFP (TQFP-144), 0.500 mm pitch |
| Terminal Form | Gull Wing | — |
| Logic Family | CMOS / SRAM-based FPGA | — |
| Internal Frequency (typical) | 80 MHz | — |
| Propagation Delay | [DATA_NEEDED: propagation delay] | 13 ns (per Microchip USA) |
| Speed Grade | -1 (slowest speed bin) | -2 |
| Configuration Method | SRAM (external serial/parallel PROM) | SRAM, in-system programmable |
| Tipo de montaje | Surface Mount | Surface Mount |
| Estado RoHS | [DATA_NEEDED: RoHS compliance] | Unknown (legacy Altera product line; verify with supplier) |
| Series | — | FLEX 10KA |
| Typical Gate Count | — | 30,000 gates |
| Logic Elements | — | 1,728 cells |
| On-chip RAM | — | 12,288 bits |
| User I/O Pins | — | 246 (max for family), 102 in this 144-TQFP variant per DigiKey listing |
| Process Technology | — | 0.42 µm CMOS, 4 metal layers |
| I/O Voltage Compatibility | — | 5.0 V / 3.3 V / 2.5 V |
| JTAG Support | — | IEEE 1149.1 boundary-scan |