EPF6024AQI208-4N vs EPF6024AQI208-1 Comparación
Comparación detallada lado a lado de EPF6024AQI208-4N por Intel y EPF6024AQI208-1 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EPF6024AQI208-4N - 24K Gate FLEX 6000 FPGA 208-PQFP | Intel (Altera)
EPF6024AQI208-4N ObsoleteAltera
EPF6024AQI208-1 - 24K Gate FLEX 6000 PLD, 208-PQFP, 172 MHz | Altera
EPF6024AQI208-1 ObsoleteComparación de especificaciones
| Parámetro | EPF6024AQI208-4N | EPF6024AQI208-1 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $18,95 | $22,85 |
| Family | FLEX 6000 | FLEX 6000 |
| Typical Gates | 24,000 | 24,000 |
| Logic Elements (LEs) | 1,960 | — |
| Maximum User I/O | 171 | — |
| Supply Voltage (VCCINT) | 3.3 V | 3.0 V to 3.6 V (3.3 V nominal) |
| I/O Standard | 3.3 V LVTTL / 5 V tolerant | — |
| Process Technology | SRAM-based CMOS LUT | CMOS, 0.42 um 4-metal layer |
| Configuration Method | Serial (ByteBlaster / BitBlaster) from external EPROM | SRAM (volatile), serial or JTAG |
| Speed Grade | -4 | — |
| Temperatura de funcionamiento | -40 °C to +85 °C (Industrial) | -40C to +85C (industrial) |
| Encapsulado | 208-pin Power Quad Flat Pack (PQFP) | 208-pin PQFP (FQFP, gull-wing) |
| Tipo de montaje | Surface Mount | — |
| Nivel MSL | 3 (168 hours) | — |
| Estado RoHS | [DATA_NEEDED: RoHS status not present in provided data] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status not present in provided data] | [DATA_NEEDED: lead-free status] |
| Device Type | — | Programmable Logic Device (PLD) |
| Logic Elements | — | 1,960 LEs (estimated from family datasheet) |
| Frecuencia de reloj máxima | — | 172 MHz |
| I/O Voltage Standard | — | 3.3 V LVTTL / LVCMOS |
| 5 V Tolerant Inputs | — | Yes |
| Número de pines | — | 208 |
| JTAG Support | — | IEEE 1149.1 boundary-scan |