EPF81188ARC240-2 vs EPF81188AQC240-3 Comparación
Comparación detallada lado a lado de EPF81188ARC240-2 por Altera y EPF81188AQC240-3 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPF81188ARC240-2 | EPF81188AQC240-3 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $178,34 | $30,00 |
| Family | FLEX 8000 | — |
| Logic Elements / Cells | 1008 | — |
| Usable Gates | 12,000 | 12,000 |
| Number of I/O | 184 | — |
| Number of Logic Blocks/Elements | 1008 | — |
| Operating Voltage | 5 V | — |
| Maximum Operating Frequency | 125 MHz | — |
| Process Technology | 0.42 µm CMOS | 0.42 µm CMOS |
| Encapsulado | 240-BFQFP (240-RQFP) Exposed Pad | 240-pin PQFP (BFQFP) 32x32 mm |
| Tipo de montaje | Surface Mount | — |
| Programmable Logic Type | Programmable (In-system reconfigurable) | — |
| PCI Compliance | Yes - PCI Local Bus Specification (PCI SIG) | — |
| In-Circuit Reconfigurability | Yes (ICR via external configuration device or intelligent controller) | Yes (ICR) |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | 0 °C to +70 °C (Commercial) |
| Estado RoHS | Non-Compliant (legacy 5 V part) | Non-compliant (per ICComponents listing) |
| Development Tool | Altera MAX+PLUS II | — |
| HD Languages | VHDL, Verilog HDL | — |
| Manufacturer | — | Altera (now Intel) |
| Series | — | FLEX 8000 |
| Device Type | — | FPGA (Field-Programmable Gate Array) |
| Logic Cells / Elements | — | 1,008 |
| Logic Array Blocks (LABs) | — | 126 |
| User I/Os | — | 184 |
| Maximum Toggle Frequency | — | 125 MHz |
| Tensión de alimentación | — | 4.75 V to 5.25 V (5 V nominal) |
| Speed Grade | — | -3 |
| Configuration Method | — | SRAM, loaded at power-up via EPC1/EPC1213/EPC1064/EPC1441 or controller |
| Boundary-Scan Support | — | JTAG IEEE 1149.1 |