EPF8282ATI100-3 vs EPF8282ATI100-3S Comparación
Comparación detallada lado a lado de EPF8282ATI100-3 por Altera y EPF8282ATI100-3S por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EPF8282ATI100-3 - 2.5K Gates, 208 Cells, 125MHz FLEX 8000 FPGA | Altera
EPF8282ATI100-3 ObsoleteIntel
EPF8282ATI100-3S - FLEX 8000 FPGA, 2.5K Gates, 100-TQFP | Intel / Altera
EPF8282ATI100-3S NrndComparación de especificaciones
| Parámetro | EPF8282ATI100-3 | EPF8282ATI100-3S |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $15,60 | $14,50 |
| Family | FLEX 8000 | FLEX 8000 |
| Logic Cells | 208 | — |
| Usable Gates | 2,500 | — |
| Logic Array Blocks (LABs) | 26 | — |
| User I/Os | 78 | — |
| Process Technology | 0.42 µm CMOS | CMOS |
| Tensión de alimentación | 5 V | — |
| Maximum Operating Frequency | 125 MHz | — |
| Speed Grade | -3 | -3 |
| Encapsulado | 100-pin TQFP | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Configuration Memory | CMOS SRAM | — |
| Configuration Schemes | Serial (EPC1/EPC1064/EPC1213/EPC1441) or parallel EPROM | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | -40C to +85C (industrial, I grade) |
| Estado RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance status] |
| Device Logic Elements / Cells | — | 208 |
| Number of LABs/CLBs | — | 26 |
| Number of Logic Elements / Cells | — | 208 |
| Total RAM Bits | — | [DATA_NEEDED: embedded RAM bits] |
| Number of I/O | — | 78 |
| Number of Gates | — | 2500 |
| Voltage - Supply | — | 5 V |
| Encapsulado / Carcasa | — | 100-TQFP |
| Supplier Device Package | — | 100-TQFP |
| Maximum Toggle Frequency | — | 125 MHz |
| Architecture | — | SRAM-based, in-circuit reconfigurable (ICR) |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |