EPF8820AQC208-2 vs EPF8820AQC208-3 Comparación
Comparación detallada lado a lado de EPF8820AQC208-2 por Altera y EPF8820AQC208-3 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EPF8820AQC208-2 - FLEX 8000 FPGA, 8K Gates, 152 I/O, 5V, PQFP-208 | Altera
EPF8820AQC208-2 ObsoleteComparación de especificaciones
| Parámetro | EPF8820AQC208-2 | EPF8820AQC208-3 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $22,80 | $18,95 |
| Manufacturer | Altera (Intel PSG) | — |
| Family | FLEX 8000 | FLEX 8000 |
| Device Type | FPGA - Field Programmable Gate Array | FPGA (Field Programmable Gate Array) |
| Usable Gates | 8,000 | 8,000 |
| Logic Cells / Registers | 672 | — |
| Logic Array Blocks (LABs) | 84 (8 LEs per LAB) | 84 |
| User I/Os | 152 | 152 |
| Maximum Operating Frequency | 125 MHz | — |
| Tensión de alimentación | 5 V | — |
| Logic Family | CMOS | — |
| Temperatura de funcionamiento | 0 C to 70 C (Commercial) | 0 C to 70 C (Commercial) |
| Package Type | 208-BFQFP / 208-Pin PQFP (FQFP) | — |
| Package Code | FQFP, gull-wing terminals | — |
| Tipo de montaje | Surface Mount | Surface Mount (Gull-Wing) |
| Process Technology | CMOS, SRAM-based configuration | CMOS SRAM |
| Configuration Method | In-Circuit Reconfigurability (ICR) via external device; SRAM-volatile | Serial or parallel EPROM (EPC1, EPC1064, EPC1213, EPC1441), system controller |
| JTAG / Boundary Scan | IEEE 1149.1 compliant | — |
| Estado RoHS | [DATA_NEEDED: rohs status not specified in provided data] | [DATA_NEEDED: RoHS status] |
| Grade | Commercial | — |
| Logic Elements (LEs) | — | 672 |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5 V nominal) |
| Encapsulado | — | 208-pin PQFP (Plastic Quad Flat Pack), 28 x 28 mm |
| Boundary Scan | — | JTAG IEEE 1149.1 |
| In-Circuit Reconfigurability | — | Yes (ICR) |
| Speed Grade | — | -3 |
| Estado del ciclo de vida | — | Obsolete (EOL) |