EPF8820ARC208-4 vs EPF8820ARC-4N Comparación
Comparación detallada lado a lado de EPF8820ARC208-4 por Altera y EPF8820ARC-4N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EPF8820ARC208-4 - FLEX 8000 FPGA, 8K Gates, 672 Cells, 208-RQFP | Altera
EPF8820ARC208-4 ⚠ Última compra
Comparación de especificaciones
| Parámetro | EPF8820ARC208-4 | EPF8820ARC-4N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $25,40 | $19,40 |
| Device Family | FLEX 8000 | — |
| Series | FLEX 8000 | — |
| Usable Gates | 8,000 (up to 16,000 with utilization) | 8,000 |
| Logic Elements (Cells) | 672 | — |
| Number of Registers | 1,500 | — |
| Maximum User I/O | 152 | 152 |
| Supply Voltage (VCCINT/Logic Core) | 5 V nominal (4.75 V - 5.25 V) | — |
| Encapsulado / Carcasa | 208-BFQFP (RQFP) Exposed Pad | — |
| Package Dimensions | 28 mm x 28 mm | — |
| Supplier Device Package | 208-RQFP (28x28) | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Speed Grade | -4 | -4 (industrial) |
| Temperatura de funcionamiento | 0 C to +70 C (commercial) [DATA_NEEDED: explicit -40/+85 grade info] | — |
| Process Technology | CMOS, 0.5 um (5 V SRAM-based) | 0.42 µm CMOS SRAM |
| Configuration Memory | SRAM (volatile - external configuration device required) | — |
| In-Circuit Reconfigurability | Yes (ICR via external configuration devices) | — |
| Nivel MSL | [DATA_NEEDED: MSL rating not in provided data] | — |
| Estado RoHS | [DATA_NEEDED: RoHS status not in provided data] | [DATA_NEEDED: RoHS status] |
| Family | — | FLEX 8000 |
| Logic Elements | — | 672 |
| Tensión de alimentación | — | 5 V |
| Maximum Operating Frequency | — | 125 MHz |
| Encapsulado | — | 208-pin RQFP (Plastic Quad Flat Pack with exposed pad) |
| LE Architecture | — | 4-input LUT + register |
| Configuration Method | — | SRAM, loaded at power-up |
| Configuration Devices | — | EPC1, EPC1064, EPC1213, EPC1441 |
| Boundary Scan | — | JTAG IEEE 1149.1 |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |