EPM2210F256C5 vs EPM2210F256A5NGA Comparación
Comparación detallada lado a lado de EPM2210F256C5 por Altera y EPM2210F256A5NGA por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EPM2210F256C5 - MAX II CPLD 1700 Macrocells 201MHz FBGA-256 | Altera / Intel
EPM2210F256C5 NrndComparación de especificaciones
| Parámetro | EPM2210F256C5 | EPM2210F256A5NGA |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $14,95 | $48,75 |
| Device Family | MAX II | — |
| Series | EPM2210 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells (Logic Elements) | 1700 | — |
| Maximum Internal Frequency | 201.1 MHz | — |
| Propagation Delay | 5 ns (C5 speed grade) | — |
| User I/Os | 272 | — |
| Tensión de alimentación | 2.5 V / 3.3 V (MultiVolt I/O) | — |
| Process Technology | 0.18 µm flash-based | — |
| Encapsulado | 256-ball FineLine BGA (FBGA-256) | 256-ball FineLine BGA (NGA) |
| Package Code | BGA, 17 x 17 mm, 1.0 mm pitch | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Temperatura de funcionamiento | 0C to +85C (commercial, C5 suffix) | — |
| Programming Interface | JTAG (IEEE 1149.1), in-system programmable | — |
| Configuration Memory | On-chip flash (instant-on, non-volatile) | — |
| On-chip User Flash Memory | 8 Kbits | — |
| Estado RoHS | Compliant | [DATA_NEEDED: rohs status from manufacturer] |
| Nivel MSL | 3 (per JEDEC J-STD-020) | — |
| Family | — | MAX II |
| Logic Elements | — | 2210 |
| Macrocells | — | 1700 |
| Maximum Propagation Delay (tPD) | — | 7 ns (A5 speed grade) |
| User I/O Pins | — | 212 |
| Core Voltage | — | 1.8 V |
| Rango de temperatura de funcionamiento | — | 0C to +85C (NGA, commercial) |
| Programmable Logic Blocks | — | 16 Logic Array Blocks |
| User Flash Memory | — | 8 Kbits (typical for MAX II family) |
| Configuration Method | — | On-chip Flash, in-system programmable via JTAG |
| I/O Standards | — | LVTTL, LVCMOS, PCI, LVDS (per bank) |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: lead-free / halogen-free status] |