EPM240F100C5N vs EPM240GT100 Comparación
Comparación detallada lado a lado de EPM240F100C5N por Intel y EPM240GT100 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM240F100C5N | EPM240GT100 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $5,20 | $6,95 |
| Device Family | MAX II | — |
| Logic Elements (LEs) | 240 | 240 |
| Macrocells | 192 | — |
| User I/O Pins (maximum) | 80 | — |
| Pin-to-Pin Logic Delay (tPD) | 4.7 ns | — |
| Maximum Operating Frequency | [DATA_NEEDED: fmax per datasheet] | — |
| Global Clock Networks | [DATA_NEEDED: count] | — |
| Encapsulado | 100-ball FineLine BGA (FBGA-100) | TQFP-100 (GT suffix) |
| Rango de temperatura de funcionamiento | 0C to +85C (commercial) | — |
| Supply Voltage Core (VCCINT) | 3.3 V | — |
| I/O Bank Voltage (VCCIO) | 1.5V / 1.8V / 2.5V / 3.3V (MultiVolt) | — |
| Configuration Memory | Non-volatile flash (instant-on) | — |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Programming Interface | JTAG / ByteBlasterMV | JTAG (IEEE 1149.1) / ISP |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount |
| Estado RoHS | Compliant | Compliant |
| Family | — | MAX II |
| Equivalent Macrocells | — | 192 |
| Non-Volatile Flash Memory | — | 8 Kbits |
| Maximum User I/Os | — | 80 |
| Process Technology | — | 0.18 um, 6-layer-metal flash |
| Core Voltage | — | 3.3 V or 2.5 V |
| I/O Standards Supported | — | 1.8V, 2.5V, 3.3V, 5V (MultiVolt) |
| Pin-to-Pin Propagation Delay | — | [DATA_NEEDED: tPD value] |
| Operating Temperature (Commercial) | — | 0 C to 85 C |
| Operating Temperature (Industrial) | — | -40 C to 100 C |
| Design Software | — | Quartus II / Quartus Prime Lite |