EPM240GT100I5 vs EPM240GT100C5N Comparación
Comparación detallada lado a lado de EPM240GT100I5 por Intel y EPM240GT100C5N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM240GT100I5 | EPM240GT100C5N |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $6,10 | $9,20 |
| Family | MAX II | MAX II |
| Logic Elements | 240 | — |
| Equivalent Macrocells | 192 | — |
| User I/O Pins | 80 | — |
| Propagation Delay (tPD) | 7.5 ns | — |
| User Flash Memory (UFM) | 8 Kbits | 8 Kbits |
| Process Technology | 0.18 um, 6-layer-metal flash | — |
| Temperatura de funcionamiento | -40C to +100C (industrial) | 0C to +85C (Commercial) |
| Encapsulado | TQFP-100 (GT100) | 100-pin TQFP (T100) |
| Package Body Size | 16 mm x 16 mm | — |
| Lead Pitch | 0.50 mm | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Supply Voltage (Core) | 3.0 V to 3.6 V (VCCINT) | — |
| I/O Voltage (VCCIO) | 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | — |
| Estado RoHS | Compliant | Compliant |
| Series | — | EPM240 |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements (LEs) | — | 240 |
| Macrocells | — | 192 |
| User I/Os | — | 80 |
| Pin-to-Pin Delay (tPD) | — | 4.7 ns |
| Core Supply Voltage (VCCINT) | — | 2.5 V or 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Programmable Type | — | In-System Programmable (ISP) via JTAG |
| Configuration Memory | — | Non-volatile Flash (instant-on) |
| Nivel MSL | — | 3 |