EPM240T100C4N vs EPM240T100C4 Comparación
Comparación detallada lado a lado de EPM240T100C4N por Altera y EPM240T100C4 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM240T100C4N | EPM240T100C4 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $6,10 | $8,20 |
| Family | MAX II | — |
| Device | EPM240 | — |
| Macro Cells | 192 | — |
| Logic Elements | 240 | — |
| Propagation Delay (tPD) | 4.7 ns (max) | — |
| Maximum Frequency | 247.5 MHz | — |
| User I/O | 80 | — |
| Supply Voltage - Internal | 2.5 V / 3.3 V | — |
| I/O Voltage (MultiVolt) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Process Technology | 0.18 µm | 0.18 µm CMOS, non-volatile Flash |
| Programmable Type | In-System Programmable (Flash) | In System Programmable |
| Encapsulado / Carcasa | 100-TQFP | 100-pin TQFP |
| Tipo de montaje | Surface Mount | Surface Mount |
| Temperatura de funcionamiento | 0 °C to +85 °C (commercial, 'C' suffix) | 0 °C to +85 °C (TJ, commercial) |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Estado RoHS | Compliant (lead-free, 'N' suffix) | [DATA_NEEDED: RoHS status] |
| Series | — | MAX II |
| Number of Macrocells | — | 192 |
| Number of Logic Elements/Blocks | — | 240 |
| Number of User I/O | — | 80 |
| Maximum Propagation Delay (tPD) | — | 4.7 ns |
| Internal Supply Voltage | — | 2.5 V / 3.3 V |
| I/O Bank Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| User Flash Memory | — | 8 Kbits (typical) |
| Programming Interface | — | JTAG (IEEE 1149.1) - ISP |
| Supplier Device Package | — | 100-TQFP (16 × 16 mm, 0.5 mm pitch) |
| Nivel MSL | — | [DATA_NEEDED: MSL level] |