EPM240T100I5 vs EPM240T100C3N Comparación
Comparación detallada lado a lado de EPM240T100I5 por Intel y EPM240T100C3N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM240T100I5 | EPM240T100C3N |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $5,88 | $9,05 |
| Family | MAX II | — |
| Series | EPM240 | MAX II |
| Device Sub-family | EPM240T100 | — |
| Logic Elements (LE) | 240 | 240 |
| Equivalent Macrocells | 192 | — |
| User Flash Memory (UFM) | 8 Kbits | 8 Kbits |
| Maximum User I/O Pins | 80 | — |
| Encapsulado | TQFP-100 (100-pin) | 100-pin TQFP (14x14 mm) |
| Temperatura de funcionamiento | -40C to +100C (industrial) | 0 °C to +85 °C (commercial) |
| Speed Grade | I5 | — |
| Core Voltage | 3.3 V | — |
| MultiVolt I/O Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Propagation Delay (typical) | 4-7 ns | — |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG (IEEE 1149.1) / ISP |
| Tipo de montaje | Surface Mount | Surface Mount |
| Estado RoHS | [DATA_NEEDED: rohs status] | Compliant |
| Device Family | — | MAX II CPLD (EPM240) |
| Macrocells | — | 192 |
| User I/O Pins | — | 80 |
| Configuration Memory | — | Internal Flash (non-volatile) |
| Pin-to-Pin Logic Delay (tPD) | — | 4.4 ns (typical) |
| Maximum Operating Frequency | — | 200 MHz (internal oscillator) |
| Core Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Quiescent Current (typical) | — | 35 mA |
| Nivel MSL | — | [DATA_NEEDED: MSL rating] |