EPM3032ATC44-10NAB vs EPM3032ATC44-7N Comparación
Comparación detallada lado a lado de EPM3032ATC44-10NAB por Intel y EPM3032ATC44-7N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EPM3032ATC44-10NAB - 32-Macrocell CPLD, 10ns, 3.3V | Intel (Altera)
EPM3032ATC44-10NAB ObsoleteIntel
EPM3032ATC44-7N - MAX 3000A CPLD, 32 Macrocells, 7.5ns, 44-TQFP
EPM3032ATC44-7N ⚠ Última compraComparación de especificaciones
| Parámetro | EPM3032ATC44-10NAB | EPM3032ATC44-7N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $4,10 | $2,88 |
| Product Family | MAX 3000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Logic Elements / Macrocells | 32 macrocells | 32 macrocells |
| Usable Gates | 600 | 600 gates |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Operating Frequency | 103.1 MHz (per Arrow listing) | — |
| Number of User I/O | 34 (max for 44-pin TQFP package) | — |
| Core Supply Voltage (VCCINT) | 3.3 V | 3.3 V |
| I/O Supply Voltage (VCCIO) | 3.3 V (MultiVolt I/O compatible with 5.0 V, 3.3 V, 2.5 V logic) | 2.5 V / 3.3 V / 5.0 V (MultiVolt I/O) |
| Encapsulado | 44-pin TQFP | 44-TQFP |
| Tipo de montaje | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE Std. 1149.1 / IEEE Std. 1532 ISP) | JTAG (IEEE Std. 1149.1) ISP |
| Configuration Memory | Non-volatile EEPROM | EEPROM (non-volatile) |
| Hot-Socketing Support | Yes | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | 0 C to +70 C (commercial) |
| Estado RoHS | Compliant (per -NAB suffix convention) | Compliant |
| Delivery Form | Tray ('AB' suffix per Altera order code convention) | — |
| Process Technology | CMOS, EEPROM-based | CMOS |
| Family | — | MAX 3000A |
| Logic Array Blocks | — | 2 LABs |
| Number of User I/O Pins | — | 34 |
| Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Internal Frequency | — | 138.9 MHz |