EPM3032ATC44-4N vs EPM3064ATC44-4N Comparación
Comparación detallada lado a lado de EPM3032ATC44-4N por Intel y EPM3064ATC44-4N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM3032ATC44-4N | EPM3064ATC44-4N |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $1,78 | $3,45 |
| Series | MAX 3000A | — |
| Family | MAX 3000A CPLD family (Altera/Intel) | MAX 3000A |
| Macro Cells | 32 | 64 |
| Logic Array Blocks (LABs) | 2 | — |
| User I/Os | 34 | — |
| Propagation Delay (tPD) | 4.5 ns | — |
| Maximum Frequency | 227.3 MHz | — |
| Configuration Memory | EEPROM (non-volatile, in-system programmable) | — |
| Supply Voltage (VCCINT) | 3.3 V | 3.3 V |
| I/O Tolerance | 5.0 V tolerant inputs | — |
| Rango de temperatura de funcionamiento | 0C to +70C (commercial) | — |
| Encapsulado | 44-pin TQFP | 44-pin TQFP |
| Programming Interface | IEEE 1149.1 JTAG, IEEE 1532 ISP | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Boundary-Scan (BST) | Compliant with IEEE 1149.1 | — |
| Estado RoHS | [DATA_NEEDED: RoHS status from data] | [DATA_NEEDED: rohs status] |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks | — | 2 |
| Number of I/Os | — | 34 |
| Dedicated Inputs | — | 4 |
| Usable Gates | — | 1,250 |
| Propagation Delay (tpd) | — | 4.5 ns |
| Maximum Counter Frequency | — | 222.2 MHz |
| I/O Supply Voltage (VCCIO) | — | 2.5 V or 3.3 V |
| Programmability | — | EEPROM, in-system programmable (JTAG) |
| JTAG Support | — | IEEE Std. 1149.1 (boundary-scan) and IEEE Std. 1532 (ISP) |
| Temperatura de funcionamiento | — | 0C to +70C (commercial) |