EPM3032ATC44-7 vs EPM3064ATC44-7 Comparación
Comparación detallada lado a lado de EPM3032ATC44-7 por Altera y EPM3064ATC44-7 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM3032ATC44-7 | EPM3064ATC44-7 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $2,32 | $4,20 |
| Family | MAX 3000A | MAX 3000A |
| Macro Cells | 32 | — |
| Logic Array Blocks | 2 | 4 |
| Usable Gates | 600 | 1.25K |
| Maximum User I/O | 34 | — |
| Propagation Delay (tPD) | 7.5 ns | — |
| Internal Counter Frequency (fCNT) | 138.9 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Standard | MultiVolt, 3.3 V / 5 V tolerant | — |
| Temperatura de funcionamiento | 0 °C to +70 °C (commercial) | 0C to +70C (Commercial) |
| Encapsulado | 44-pin TQFP | TQFP-44 |
| Tipo de montaje | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1) ISP | IEEE Std. 1149.1 JTAG (ISP) |
| Output Options | Totem-pole or open-drain per I/O | — |
| Process Technology | CMOS EEPROM (non-volatile) | CMOS EEPROM |
| Estado RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Lead-Free / Pb-Free | [DATA_NEEDED: lead-free status] | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 64 |
| User I/O Pins | — | 34 |
| Recuento de pines | — | 44 |
| Speed Grade | — | -7 (7.5 ns tPD) |
| Pin-to-Pin Propagation Delay | — | 7.5 ns |
| Maximum Counter Frequency | — | 192.3 MHz |
| Supply Voltage (Core) | — | 3.3 V |
| I/O Logic Compatibility | — | 5.0 V / 3.3 V / 2.5 V (MultiVolt) |