EPM3032ATI44-10N vs EPM3032ATC-44-10N Comparación
Comparación detallada lado a lado de EPM3032ATI44-10N por Intel y EPM3032ATC-44-10N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM3032ATI44-10N | EPM3032ATC-44-10N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $5,10 | $1,10 |
| Family | MAX 3000A | MAX 3000A |
| Logic Capacity | 600 usable gates | — |
| Number of Macrocells | 32 | — |
| Number of User I/Os | 34 | — |
| Encapsulado / Carcasa | TQFP-44 (10x10 mm, 0.8 mm pitch) | — |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V (3.3 V typical) | 3.3 V |
| MultiVolt I/O Interface | 5.0 V, 3.3 V, 2.5 V compatible | — |
| Pin-to-Pin Delay (tPD) | 10 ns | 10 ns |
| Counter Frequency (fCNT) | 103.1 MHz | — |
| Setup Time (tSU) | [DATA_NEEDED: setup time] | — |
| Programmability | In-System Programmable (ISP) via IEEE Std. 1149.1 JTAG | — |
| ISP Standard | IEEE Std. 1532 compliant | — |
| Configuration Memory | Non-volatile EEPROM | — |
| Hot-Socketing Support | Yes | — |
| Temperatura de funcionamiento | -40C to +85C (industrial, 'I' grade) | 0C to +70C (Commercial) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Estado RoHS | RoHS Non-Compliant (contains lead) | Compliant |
| Lead-Free Status | Contains lead | — |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Usable Gates | — | 600 |
| Macrocells | — | 32 |
| Logic Array Blocks (LABs) | — | 2 |
| User I/O Pins | — | 34 |
| Maximum Counter Frequency (fCNT) | — | 103.1 MHz |
| Encapsulado | — | 44-pin TQFP |
| Programming Technology | — | EEPROM (non-volatile) |
| In-System Programming | — | IEEE Std. 1532 compliant (JTAG) |
| MultiVolt I/O Support | — | 1.8 V / 2.5 V / 3.3 V |
| Open-Drain Output Option | — | Yes (per I/O pin) |
| Programmable Security Bit | — | Yes |