EPM3128AFC256-7N vs EPM3128ATC100-10NS Comparación
Comparación detallada lado a lado de EPM3128AFC256-7N por Altera y EPM3128ATC100-10NS por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM3128AFC256-7N | EPM3128ATC100-10NS |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $19,85 | $6,50 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD - Complex Programmable Logic Device | CPLD (Complex Programmable Logic Device) |
| Architecture | CMOS EEPROM-based MAX | — |
| Macro Cells | 128 | 128 |
| Usable Gates | 2,500 | — |
| User I/Os | 98 | 80 |
| Propagation Delay (tPD) | 7.5 ns | — |
| Internal fMAX | 192.3 MHz | — |
| Supply Voltage - Core (VCCINT) | 3.3 V | 3.3 V |
| Supply Voltage - I/O (VCCIO) | 3.3 V or 2.5 V | 3.3 V or 2.5 V (5.0 V-tolerant inputs) |
| Logic Family | CMOS | — |
| Programmability | In-system (ISP), IEEE Std. 1532, JTAG (IEEE Std. 1149.1) | In-system (ISP), IEEE Std. 1532 |
| Encapsulado | 256-BGA (FineLine, FBGA) | TQFP-100 |
| Temperatura de funcionamiento | 0 C to +70 C (commercial) | [DATA_NEEDED: operating temperature range] |
| Tipo de montaje | Surface Mount | Surface Mount |
| Recuento de pines | — | 100 |
| Pin-to-Pin Logic Delay (tPD) | — | 10 ns |
| Counter Frequency (fCNT) | — | up to 227.3 MHz |
| Logic-Level Compatibility | — | 5.0 V, 3.3 V, 2.5 V |
| Boundary Scan | — | IEEE 1149.1 JTAG |
| Configuration Memory | — | EEPROM (non-volatile) |
| Estado RoHS | — | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |