EPM3128ATC144-7N vs EPM3128ATI144-10N Comparación
Comparación detallada lado a lado de EPM3128ATC144-7N por Altera y EPM3128ATI144-10N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EPM3128ATI144-10N - 128-Macrocell MAX 3000A CPLD, 10ns | Intel / Altera
EPM3128ATI144-10N NrndComparación de especificaciones
| Parámetro | EPM3128ATC144-7N | EPM3128ATI144-10N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $9,25 | $10,32 |
| Series | MAX 3000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Architecture | EEPROM-based, MAX architecture | — |
| Number of Macrocells | 128 | — |
| Number of Usable Gates | Up to 10,000 | — |
| User I/Os | 96 | 96 |
| Recuento de pines | 144 | — |
| Encapsulado | TQFP-144 (20 x 20 mm, 0.5 mm pitch) | 144-pin TQFP |
| Logic Family | CMOS | — |
| Propagation Delay (tPD) | 7.5 ns (pin-to-pin, -7 speed grade) | 10 ns |
| Counter Frequency | Up to 227.3 MHz | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 2.5 V / 3.3 V / 5.0 V (MultiVolt) | — |
| Temperatura de funcionamiento | 0 °C to +70 °C (commercial) | Industrial -40C to +85C |
| In-System Programmability (ISP) | Yes, via JTAG (IEEE 1149.1) | — |
| PCI Compliance | Compatible with PCI Local Bus Specification Rev. 2.2 | — |
| Tipo de montaje | Surface Mount (SMD/SMT) | Surface Mount |
| Estado RoHS | Lead-free (-7N suffix indicates Pb-free finish) | Compliant |
| Family | — | MAX 3000A |
| Logic Type | — | CMOS EEPROM-based CPLD |
| Macrocells | — | 128 |
| Typical Gates | — | 2.5K |
| Maximum Internal Frequency | — | 98 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| Output Bank Voltage (VCCIO) | — | 3.3 V or 2.5 V |
| In-System Programmability | — | Yes (IEEE Std. 1532 compliant) |
| JTAG / Boundary Scan | — | Yes (IEEE 1149.1) |
| Configuration Memory | — | Non-volatile EEPROM |