EPM3512AFC256-10N vs EPM3512AFC256-19 Comparación
Comparación detallada lado a lado de EPM3512AFC256-10N por Altera y EPM3512AFC256-19 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM3512AFC256-10N | EPM3512AFC256-19 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $43,22 | $10,85 |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 512 | 512 |
| Usable Gates | 10000 | 10000 |
| User I/O Pins | 208 | 208 |
| Logic Array Blocks (LABs) | [DATA_NEEDED: number of LABs] | 16 |
| Operating Frequency (fMAX) | [DATA_NEEDED: fMAX MHz] | — |
| Pin-to-Pin Delay (tPD) | 10 ns | 7.5 ns |
| Setup Time (tSU) | 4.5 ns | — |
| VCCINT (Core Supply) | 3.3 V | — |
| VCCIO (I/O Supply) | 3.3 V or 2.5 V | — |
| Technology | CMOS EEPROM-based, non-volatile | — |
| Operating Temperature (Commercial) | 0 C to +70 C | — |
| Encapsulado | 256-ball FBGA (17 mm x 17 mm) | 256-ball FineLine BGA (FC) |
| ISP Interface | IEEE Std. 1149.1 JTAG, IEEE Std. 1532 | — |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount |
| Nivel MSL | [DATA_NEEDED: MSL rating] | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Maximum Operating Frequency | — | 80 MHz |
| Speed Grade | — | -19 |
| Supply Voltage VCCINT | — | 3.3 V |
| I/O Supply Voltage VCCIO | — | 2.5 V or 3.3 V (5.0 V tolerant inputs) |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP (IEEE 1532) |
| Process Technology | — | 0.30 µm CMOS EEPROM |
| Temperatura de funcionamiento | — | -40C to +85C (industrial) |
| Non-volatile Configuration | — | Yes (EEPROM-based) |