EPM5016DC-20 vs EPM5032DI25 Comparación
Comparación detallada lado a lado de EPM5016DC-20 por Altera y EPM5032DI25 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5016DC-20 | EPM5032DI25 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $16,50 | $11,10 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (UV-Erasable Programmable Logic Device) | UV-erasable EPLD (CMOS EPROM-based) |
| Macrocells | 16 | 32 |
| Product Terms | 160 | 320 |
| Dedicated Inputs | 7 | 7 |
| I/O Pins | 8 | — |
| Propagation Delay (tPD) | 20 ns | — |
| Frecuencia de reloj máxima | 62.5 MHz | — |
| Maximum Supply Voltage | 5.25 V | — |
| Nominal Supply Voltage | 5.0 V | — |
| Process Technology | CMOS, UV-erasable | — |
| Architecture | PAL-type macrocell with Programmable Interconnect Array (PIA) | — |
| Package Type | 20-pin Ceramic DIP (Cerdip) with UV window | — |
| Package Suffix Code | DC = Ceramic DIP, Commercial | — |
| Speed Grade | -20 = 20 ns tPD | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | — |
| Programming Method | UV erase + EPROM-style programming via Altera programming hardware | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance] | — |
| Logic Array Blocks (LABs) | — | 2 |
| Output Macrocells | — | 16 |
| Bidirectional I/O Pins | — | 16 |
| Total Inputs | — | 24 |
| Pin-to-Pin Delay (tPD) | — | 25 ns |
| Maximum Clock Frequency (fMAX) | — | 62.5 MHz |
| Supply Voltage (VCC) | — | 5 V (single supply) |
| I/O Standard | — | TTL-compatible |
| Encapsulado | — | 24-pin Ceramic DIP (DI) with quartz window |
| Programming Technology | — | UV-EPROM (erasable via quartz window) |