EPM5032DC20 vs EPM5032DC-15 Comparación
Comparación detallada lado a lado de EPM5032DC20 por Altera y EPM5032DC-15 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EPM5032DC-15 - 600-Gate, 32-Macrocell UV PLD | Altera MAX 5000 | DIP-28
EPM5032DC-15 ObsoleteComparación de especificaciones
| Parámetro | EPM5032DC20 | EPM5032DC-15 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $8,20 | $9,95 |
| Device Family | MAX 5000 | — |
| Product Type | UV-erasable PLD (CPLD class) | — |
| Macrocells | 32 | 32 |
| Usable Gates | 600 | 600 |
| Propagation Delay (tPD) | 20 ns | 15 ns |
| Maximum Frequency (Fmax) | 71.4 MHz | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | 5 V (nominal) |
| Dedicated Inputs | 7 | — |
| I/O Pins | 16 (bidirectional) | — |
| Total Inputs (max) | 24 | — |
| Output Macrocells | 16 | — |
| Clock Inputs | 1 (global) | — |
| Architecture | PAL-type with Programmable Interconnect Array (PIA) | — |
| Process Technology | CMOS | CMOS |
| Encapsulado | 20-pin Ceramic DIP (DC) with UV window | CERDIP-28 (windowed, through-hole) |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial) |
| Tipo de montaje | Through-Hole (DIP) | Through-Hole (DIP) |
| Estado RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Family | — | MAX 5000 |
| Device Type | — | UV-erasable EPLD (PAL-type CMOS) |
| Maximum Toggle Frequency (fMAX) | — | 83.3 MHz |
| Logic Family | — | CMOS, TTL-compatible I/O |
| Programmable Pins | — | 16 bidirectional I/O + 4 dedicated input = 20 |
| Total Package Pins | — | 28 |
| Erasure Method | — | UV light through ceramic quartz window |
| Lead-Free | — | unknown |