EPM5032PC-20 vs EPM5032SC-20 Comparación
Comparación detallada lado a lado de EPM5032PC-20 por Altera y EPM5032SC-20 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5032PC-20 | EPM5032SC-20 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $7,05 | $8,75 |
| Device Family | MAX 5000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | EPLD (Erasable Programmable Logic Device) |
| Programming Type | OTP (One-Time Programmable) | — |
| Macrocells | 32 | 32 |
| Usable Gates | 600 | — |
| Logic Blocks | 2 Logic Array Blocks | — |
| Product Terms | 320 | — |
| Dedicated Inputs | 24 | 7 |
| Bidirectional I/O Lines | 16 | — |
| Propagation Delay (tPD) | 20 ns | 20 ns |
| Frecuencia de reloj máxima | 62.5 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (nominal 5 V) | — |
| Technology | CMOS, 0.65 um process | CMOS EPROM cell |
| Architecture | PAL-type macrocells with Programmable Interconnect Array (PIA) | PAL-type, CMOS, UV-erasable |
| Encapsulado | PDIP-28 (Plastic DIP, 28-pin) | 20-pin SOIC (Small Outline) |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | 0 °C to +70 °C (commercial grade) |
| Tipo de montaje | Through-Hole | Surface Mount |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status not confirmed in verified data] |
| Family | — | MAX 5000 |
| I/O Pins | — | 16 |
| Outputs | — | 16 |
| Speed Grade | — | -20 (20 ns) |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| Tensión de alimentación | — | [DATA_NEEDED: VCC typical range] |
| Programmability | — | One-time programmable (windowless SOIC) |