EPM5064LC vs EPM5064JI-1 Comparación
Comparación detallada lado a lado de EPM5064LC por Altera y EPM5064JI-1 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5064LC | EPM5064JI-1 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $7,10 | $3,40 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD (Complex Programmable Logic Device) | EPLD (Erasable Programmable Logic Device) |
| Programming Type | OTP (One-Time-Programmable, UV-erasable EPROM) | — |
| Macro Cells | 64 | — |
| Usable Gates | 1.25K | — |
| Logic Array Blocks (LABs) | 4 | — |
| Propagation Delay (tPD) | 55 ns | [DATA_NEEDED: combinational tPD from datasheet] |
| Total Inputs | 36 (7 dedicated + 29 I/O) | — |
| I/O Pins | 28 bidirectional + 4 dedicated input | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Temperatura de funcionamiento | 0C to +70C (Commercial) | [DATA_NEEDED: commercial vs industrial grade temp range] |
| Encapsulado | PLCC-44 (LCC-44, J-lead) | 68-pin PLCC (windowed ceramic) |
| Process Technology | CMOS EPROM | CMOS, UV-erasable |
| Tipo de montaje | Surface Mount | Surface Mount |
| Estado RoHS | [DATA_NEEDED: RoHS status - pre-RoHS legacy part, likely non_compliant] | [DATA_NEEDED: not stated in provided data] |
| Lead Free | [DATA_NEEDED: lead-free status] | — |
| Macrocells | — | 64 |
| User I/O Pins | — | [DATA_NEEDED: user I/O count from datasheet] |
| Logic Elements | — | [DATA_NEEDED: total logic elements] |
| Tensión de alimentación | — | 5 V |
| Speed Grade | — | JI-1 (commercial, -10/-12/-15 family) |
| Programmability | — | UV-erasable (windowed package) |
| Data Retention | — | 25 years (per MAX 5000 datasheet) |