EPM5128GC2 vs EPM5128GC Comparación
Comparación detallada lado a lado de EPM5128GC2 por Altera y EPM5128GC por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5128GC2 | EPM5128GC |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $54,00 | $19,20 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Macro Cells | 128 | — |
| Usable Gates | 2.5K | 2,500 |
| Logic Array Blocks (LABs) | 8 (16 macro cells each) | — |
| Maximum Internal Frequency | 50 MHz | — |
| Supply Voltage VCC | 5 V | — |
| I/O Pins | 64 | — |
| Dedicated Inputs | 16 | — |
| Encapsulado | Ceramic PGA (GC, windowed) | — |
| Programmable Flip-Flop Modes | D / T / JK / SR (selectable) | — |
| Architecture | AND/OR plane + programmable macro cell + PIA | EPLD, programmable AND/OR array with fixed OR plane |
| Process Technology | CMOS EPROM | CMOS, UV-erasable |
| Reprogrammability | UV-erasable (windowed ceramic package) | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| Configuration Memory | On-chip EPROM (no external boot device) | Non-volatile UV-EPROM (windowed ceramic) |
| Recuento de pines | [DATA_NEEDED: total PGA pin count] | — |
| Macrocells | — | 128 |
| Logic Elements / LABs | — | [DATA_NEEDED: LAB count] |
| User I/Os | — | 68 |
| Package Type | — | WPGA (Windowed Ceramic Pin Grid Array) |
| Package Code | — | WPGA |
| Number of Terminals | — | 68 |
| Terminal Form | — | PIN/PEG (through-hole PGA with alignment pegs) |
| Package Shape | — | Square |
| Temperature Grade | — | Commercial |
| Supply Voltage (Vcc) | — | 5 V |
| Propagation Delay (tpd) | — | [DATA_NEEDED: tpd in ns] |
| Maximum Frequency (fmax) | — | [DATA_NEEDED: fmax in MHz] |
| Programmable Security Bit | — | Yes |
| Tipo de montaje | — | Through-Hole (PGA socket required) |