EPM5128JC vs EPM5128LC2 Comparación
Comparación detallada lado a lado de EPM5128JC por Altera y EPM5128LC2 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5128JC | EPM5128LC2 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $9,75 | $22,40 |
| Product Family | MAX 5000 | — |
| Device Type | EPLD / CPLD | CPLD (Complex Programmable Logic Device) |
| Macrocell Count | 128 | — |
| Propagation Delay (tPD) | 35 ns | 45 ns |
| Logic Elements | Programmable AND/OR/XOR array | — |
| Supply Voltage (VCC) | 5 V (typical) | 5 V |
| Número de pines | 68 | — |
| Package Type | PLCC-68 (JLCC) ceramic, J-leaded | — |
| Dedicated Inputs | 8 | — |
| User I/O Pins | [DATA_NEEDED: user I/O pin count] | — |
| Configuration Memory | UV-erasable EPROM (windowed package) | On-chip EPROM (non-volatile) |
| Programming Interface | Altera MAX+PLUS II / A+PLUS / legacy programmer | — |
| Temperatura de funcionamiento | Commercial 0C to +70C | -40 C to +85 C (extended commercial) |
| Tipo de montaje | Surface Mount (PLCC socket or solder) | Through-Hole / Socketed |
| Boundary Scan | JTAG IEEE 1149.1 (family feature) | JTAG / IEEE 1149.1 |
| Process Technology | CMOS EPROM | CMOS EPROM |
| Estado RoHS | [DATA_NEEDED: RoHS status - legacy part] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Family | — | MAX 5000 |
| Macrocells | — | 128 |
| Logic Array Blocks (LABs) | — | 8 |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| Global Clock Inputs | — | 1 dedicated |
| Encapsulado | — | PGA (Pin Grid Array, ceramic) |