EPM5130GI vs EPM5192GI Comparación
Comparación detallada lado a lado de EPM5130GI por Altera y EPM5192GI por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5130GI | EPM5192GI |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $16,20 | $18,95 |
| Device Family | MAX 5000 | — |
| Architecture | EPLD (Erasable Programmable Logic Device), UV-erasable | — |
| Macrocells | 128 | 192 |
| Logic Array Blocks (LABs) | 8 | 16 (12 macrocells per LAB) |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| Dedicated Inputs | 19 | 7 |
| Total Inputs | 68 | 72 |
| I/O Pins | 48 | — |
| Propagation Delay (tPD) | 55 ns | 55 ns |
| Maximum Clock Frequency (fMAX) | 33.3 MHz | — |
| External Clock Pins | 1 | — |
| Process Technology | CMOS | — |
| Tensión de alimentación | 5 V | — |
| Encapsulado | Ceramic Pin Grid Array (PGA), windowed | — |
| Temperatura de funcionamiento | -40C to +85C (industrial) | -40 C to +85 C (Industrial) |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: not confirmed in verified web data] |
| Programming Method | UV erasure + EPROM programming | — |
| Family | — | MAX 5000 |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Technology | — | CMOS EPROM (UV-erasable / OTP) |
| User I/O Pins | — | 64 |
| Maximum Internal Frequency (fCNT) | — | 33.3 MHz |
| Supply Voltage (VCC) | — | 4.5 V to 5.5 V (nominal 5 V) |
| Package Type | — | 84-pin PGA (Pin Grid Array), ceramic with quartz window |
| Programmable | — | UV-erasable (windowed) and OTP variants |
| Tipo de montaje | — | Through-hole (PGA) |