EPM5130QC-1 vs EPM5130WC-2 Comparación
Comparación detallada lado a lado de EPM5130QC-1 por Altera y EPM5130WC-2 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5130QC-1 | EPM5130WC-2 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $9,95 | $62,00 |
| Family | MAX 5000 | — |
| Product Type | UV-Erasable / OTP Complex PLD (CPLD) | UV-Erasable PLD (CPLD) |
| Logic Cells / Macrocells | 128 macrocells | — |
| Usable Gates (marketing) | 5130 gates | — |
| Speed Grade | -1 | -2 (45 ns) |
| Encapsulado | PQFP-100 (windowed ceramic) | — |
| Terminal Pitch | 0.635 mm | 0.650 mm |
| Process Technology | CMOS | CMOS |
| Configuration Memory | UV-Erasable EPROM | UV-erasable CMOS EEPROM cells |
| Tensión de alimentación | 5 V (single) | — |
| Temperatura de funcionamiento | Commercial (0 C to +70 C) | 0 °C to 70 °C (Commercial) |
| Programmable Polarity | Yes (per macrocell) | — |
| Boundary Scan / JTAG | Per MAX 5000 family | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Estado RoHS | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS status] |
| Device Family | — | MAX 5000 |
| Macrocell Count | — | 128 |
| Propagation Delay (tPD) | — | 45 ns |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Dedicated Inputs | — | 19 |
| User I/O Lines | — | 48 |
| Total Inputs (I/O + dedicated) | — | 68 |
| Package Type | — | 100-terminal Ceramic CQFP (R-CQFP-G100), windowed, gull-wing |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Logic Elements | — | AND/OR array with programmable macrocell register |