EPM5130WC-1 vs EPM5130WM883B-1 Comparación
Comparación detallada lado a lado de EPM5130WC-1 por Intel y EPM5130WM883B-1 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EPM5130WC-1 - 128-Macrocell 40ns UV CPLD, 100-pin CQFP | Intel (Altera) MAX 5000
EPM5130WC-1 ObsoleteAltera
EPM5130WM883B-1 - 128-Macrocell UV PLD, 5V, CQFP-100 | Altera MAX 5000
EPM5130WM883B-1 ObsoleteComparación de especificaciones
| Parámetro | EPM5130WC-1 | EPM5130WM883B-1 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $85,00 | $128,00 |
| Series | MAX 5000 | — |
| Manufacturer | Altera (now Intel) | Altera (now Intel PSG) |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocell Count | 128 | — |
| Logic Array Blocks | Multiple LABs (per MAX 5000 architecture) | — |
| Propagation Delay (tpd) | 40 ns | — |
| Frecuencia de reloj máxima | 50 MHz | — |
| Erasure Method | UV (ultraviolet, windowed package) | — |
| Process Technology | CMOS EPROM | — |
| User I/O Pins | Up to 100 | — |
| Package Type | 100-pin Ceramic QFP (Windowed) | CQFP-100, ceramic windowed (WM) |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: military/industrial temperature grade] |
| Tensión de alimentación | [DATA_NEEDED: VCC nominal] | — |
| Programmable | Yes (UV-erasable, non-volatile) | — |
| Logic Family | MAX 5000 (Altera) | — |
| Configuration Memory | EPROM (on-chip) | — |
| Tipo de montaje | Surface Mount | Surface Mount (CQFP with J-leads) |
| Estado RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: confirmed RoHS for ceramic windowed CQFP] |
| Device Family | — | MAX 5000 (Classic EPLD) |
| Logic Type | — | UV-Erasable Programmable Logic Device (EPLD) |
| Technology | — | CMOS, EPROM cell |
| Macrocells | — | 128 |
| Logic Array Blocks (LABs) | — | 8 |
| Dedicated Inputs | — | 19 |
| I/O Pins | — | 48 (bi-directional) |
| Propagation Delay (tPD) | — | 55 ns |
| Maximum Clock Frequency (fMAX) | — | 33.3 MHz |
| Supply Voltage (VCC) | — | 4.5 V to 5.5 V (nominal 5 V) |
| External Clock Inputs | — | 1 global + shared inputs |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| Military Screening | — | MIL-STD-883 Class B (883B suffix) |
| Programming Method | — | UV erase + EPROM programming |