EPM5192AGC vs EPM51929C Comparación
Comparación detallada lado a lado de EPM5192AGC por Altera y EPM51929C por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5192AGC | EPM51929C |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $56,00 | $9,40 |
| Family | MAX 5000 (High-Speed, High-Density MAX 5000 Devices) | — |
| Device Type | UV-Erasable / OTP Complex PLD (EPLD) | EPLD (Erasable Programmable Logic Device) |
| Macrocells | 192 | — |
| Logic Density | High-density (per MAX 5000 family definition) | [DATA_NEEDED: usable gates] |
| Architecture | CMOS, sum-of-products with macrocell output logic | Multi-array matrix (PAL-based macrocells) |
| Process Technology | CMOS | — |
| Encapsulado | 84-pin Ceramic PGA (Pin Grid Array, windowed or windowless) | — |
| Speed Grade Suffix | C (commercial grade; specific pin-to-pin delay varies by base number -15/-20) | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | Commercial (0C to +70C) |
| Programmability | UV-erasable (windowed package) / One-Time-Programmable (windowless variant) | UV-erasable, JEDEC fuse map |
| Security Bit | Programmable security bit (per MAX 5000 family) | — |
| Tensión de alimentación | [DATA_NEEDED: VCC nominal and tolerance] | [DATA_NEEDED: VCC range] |
| Tipo de montaje | Through-hole (Pin Grid Array) | Surface Mount or Through-Hole (package dependent) |
| Estado RoHS | Non-compliant (ceramic PGA contains lead; legacy military/industrial grade) | unknown |
| Lifecycle | Obsolete (legacy Altera MAX 5000 family; maintained for long-lifecycle programs) | — |
| Programming Support | MAX+PLUS II legacy toolchain / Altera-compatible third-party programmers | — |
| Device Family | — | MAX 5000 |
| Number of Macrocells | — | [DATA_NEEDED: macrocell count] |
| Número de pines | — | [DATA_NEEDED: pin count] |
| Package Type | — | [DATA_NEEDED: package suffix - C denotes commercial temperature grade] |
| Technology | — | CMOS EPROM |
| Propagation Delay | — | [DATA_NEEDED: tpd specification] |
| Maximum Toggle Frequency | — | [DATA_NEEDED: fmax] |
| Lead-Free | — | unknown |
| Nivel MSL | — | [DATA_NEEDED] |