EPM5192GC1 vs EPM5192C-2 Comparación
Comparación detallada lado a lado de EPM5192GC1 por Altera y EPM5192C-2 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5192GC1 | EPM5192C-2 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $24,50 | $13,20 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD (Complex Programmable Logic Device) | Complex Programmable Logic Device (CPLD) |
| Macro Cells | 192 | — |
| Usable Gates | 3,750 | — |
| Maximum Operating Frequency | 62.5 MHz | 50 MHz |
| Supply Voltage (VCC) | 5 V | — |
| Programming Technology | UV-Erasable / OTP EPROM | — |
| Package Type | Ceramic PGA (Pin Grid Array) | — |
| Logic Elements | 192 macrocells with AND/OR array | — |
| Process Technology | EPROM-based CMOS | CMOS |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | — |
| Propagation Delay | [DATA_NEEDED: tpd specification] | — |
| Número de pines | [DATA_NEEDED: pin count for GC1 PGA package] | — |
| Tipo de montaje | Through-hole (PGA) | — |
| Estado RoHS | unknown | unknown |
| Development Tool | Altera MAX+PLUS II | — |
| Macrocells | — | 192 |
| User I/O Pins | — | 64 |
| Logic Array Blocks (LABs) | — | 12 |
| Dedicated Inputs | — | 7 |
| External Clock Inputs | — | 1 |
| Propagation Delay (PIA, typical) | — | 45 ns |
| Configuration Memory | — | EEPROM (non-volatile) |
| Programmable Interconnect | — | Programmable Interconnect Array (PIA) |
| Speed Grade | — | -2 |
| Programming Interface | — | JTAG / Altera MAX+ programming |
| Lead-Free | — | unknown |