EPM5192GI-1 vs EPM5192C-2 Comparación
Comparación detallada lado a lado de EPM5192GI-1 por Altera y EPM5192C-2 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5192GI-1 | EPM5192C-2 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $165,00 | $13,20 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | Complex Programmable Logic Device (CPLD) | Complex Programmable Logic Device (CPLD) |
| Architecture | PAL-type, UV-erasable CMOS | — |
| Macrocells | 192 | 192 |
| User I/O Pins | 64 | 64 |
| Dedicated Inputs | 7 | 7 |
| Logic Array Blocks (LABs) | 12 | 12 |
| Propagation Delay (tPD) | 25 ns | — |
| Maximum Clock Frequency (fMAX) | 62.5 MHz | — |
| Supply Voltage (VCC) | 5.0 V | — |
| Temperatura de funcionamiento | -40C to +85C (Industrial) | — |
| Encapsulado | 84-pin PGA (Pin Grid Array), windowed ceramic | — |
| Configuration Memory | UV-EPROM (windowed ceramic PGA) | EEPROM (non-volatile) |
| Process Technology | CMOS | CMOS |
| Estado RoHS | unknown (legacy UV-windowed package) | unknown |
| External Clock Inputs | — | 1 |
| Propagation Delay (PIA, typical) | — | 45 ns |
| Maximum Operating Frequency | — | 50 MHz |
| Programmable Interconnect | — | Programmable Interconnect Array (PIA) |
| Speed Grade | — | -2 |
| Programming Interface | — | JTAG / Altera MAX+ programming |
| Lead-Free | — | unknown |