EPM5192GI-2 vs EPM5192GC-1 Comparación
Comparación detallada lado a lado de EPM5192GI-2 por Intel y EPM5192GC-1 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5192GI-2 | EPM5192GC-1 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $61,00 | $17,85 |
| Device Family | MAX 5000 | — |
| Product Type | UV-Erasable / OTP Complex PLD | — |
| Macrocells | 192 | 192 |
| User I/O Pins | 64 | 64 |
| Dedicated Inputs | 7 | 7 |
| Total Inputs | 72 | — |
| Propagation Delay (tPD) | 30 ns | — |
| Frecuencia de reloj máxima | 33.3 MHz | — |
| Supply Voltage (VCC) | 5 V nominal (4.5 V to 5.5 V) | 4.75 V to 5.25 V |
| Operating Temperature Grade | Industrial | — |
| Encapsulado | 84-pin PGA (Pin Grid Array) | 100-pin Ceramic PGA (GC) |
| Package Code | PGA | — |
| Package Shape | Square | — |
| Terminal Form | PIN/PEG (through-hole) | — |
| Programming Method | UV-erase window (erasable) / OTP | — |
| Process Technology | CMOS | CMOS, UV-erasable / OTP |
| Estado RoHS | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS status] |
| Family | — | MAX 5000 (Classic) |
| Logic Type | — | CPLD (Complex Programmable Logic Device) |
| Usable Gates | — | 3,750 |
| Logic Array Blocks (LABs) | — | 12 |
| Maximum Propagation Delay (tPD) | — | 40 ns |
| Maximum Frequency (fMAX) | — | 62.5 MHz |
| Tipo de montaje | — | Through-Hole (PGA) |
| Configuration Method | — | UV-Erase / One-Time Programmable |
| Interconnect | — | Peripheral Interconnect Array (PIA) |
| Temperatura de funcionamiento | — | [DATA_NEEDED: operating temperature grade] |