EPM5192GI vs EPM5130GI Comparación
Comparación detallada lado a lado de EPM5192GI por Altera y EPM5130GI por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5192GI | EPM5130GI |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $18,95 | $16,20 |
| Family | MAX 5000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Technology | CMOS EPROM (UV-erasable / OTP) | — |
| Macrocells | 192 | 128 |
| Logic Array Blocks (LABs) | 16 (12 macrocells per LAB) | 8 |
| User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | 19 |
| Total Inputs | 72 | 68 |
| Propagation Delay (tPD) | 55 ns | 55 ns |
| Maximum Internal Frequency (fCNT) | 33.3 MHz | — |
| Supply Voltage (VCC) | 4.5 V to 5.5 V (nominal 5 V) | — |
| Temperatura de funcionamiento | -40 C to +85 C (Industrial) | -40C to +85C (industrial) |
| Package Type | 84-pin PGA (Pin Grid Array), ceramic with quartz window | — |
| Programmable | UV-erasable (windowed) and OTP variants | — |
| Tipo de montaje | Through-hole (PGA) | — |
| Estado RoHS | [DATA_NEEDED: not confirmed in verified web data] | [DATA_NEEDED: RoHS status] |
| Device Family | — | MAX 5000 |
| Architecture | — | EPLD (Erasable Programmable Logic Device), UV-erasable |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| I/O Pins | — | 48 |
| Maximum Clock Frequency (fMAX) | — | 33.3 MHz |
| External Clock Pins | — | 1 |
| Process Technology | — | CMOS |
| Tensión de alimentación | — | 5 V |
| Encapsulado | — | Ceramic Pin Grid Array (PGA), windowed |
| Programming Method | — | UV erasure + EPROM programming |