EPM5192GM-2 vs EPM5192GM883B-2 Comparación
Comparación detallada lado a lado de EPM5192GM-2 por Intel y EPM5192GM883B-2 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5192GM-2 | EPM5192GM883B-2 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $92,00 | $142,00 |
| Family | Altera MAX 5000 | MAX 5000 |
| Device Type | EPLD (Erasable Programmable Logic Device) | CPLD (Complex Programmable Logic Device), UV-erasable |
| Macrocell Count | 192 | — |
| Logic Elements | [DATA_NEEDED: logic element count for MAX 5000 family] | — |
| Propagation Delay (tPD) | 55 ns | 45 ns (-2 speed grade) |
| Speed Grade | -2 | — |
| Process Technology | CMOS | — |
| Programmability | UV-erasable (windowed package) | — |
| Encapsulado | PGA-84 (Ceramic Pin Grid Array, windowed) | 84-pin Ceramic Pin Grid Array (CPGA), code S-CPGA-P84 |
| Recuento de pines | 84 | — |
| Tipo de montaje | Through-hole (PGA socket) | Through-hole PGA socket |
| Temperatura de funcionamiento | [DATA_NEEDED: military/industrial grade temperature range] | [DATA_NEEDED: operating temperature range] |
| Tensión de alimentación | [DATA_NEEDED: VCC nominal, typically 5 V for MAX 5000] | — |
| Estado RoHS | [DATA_NEEDED: ceramic PGA with UV window is typically non-RoHS - verify with manufacturer] | non_compliant (ceramic CPGA with MIL-STD-883 screening) |
| Datasheet Page Count | 52 | — |
| Macrocells | — | 192 |
| Maximum Internal Clock Frequency | — | 33.3 MHz |
| Supply Voltage (VCC, nominal) | — | 5 V |
| Technology | — | 5 V CMOS |
| Dedicated Inputs | — | 7 |
| User I/O Pins | — | 64 |
| Package Outline | — | 28.45 mm square (approx.) |
| Military Screening | — | MIL-STD-883 (per '883' suffix) |
| JEDEC Package Code | — | S-CPGA-P84 |