EPM5192LC-1 vs EPM5192GC-1 Comparación
Comparación detallada lado a lado de EPM5192LC-1 por Altera y EPM5192GC-1 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5192LC-1 | EPM5192GC-1 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $14,20 | $17,85 |
| Family | MAX 5000 | MAX 5000 (Classic) |
| Device Type | EPLD / CPLD | — |
| Macrocells | 192 | 192 |
| Logic Gates | 3750 (typical usable) | — |
| Dedicated Inputs | 7 | 7 |
| User I/O | 64 | — |
| Número de pines | 84 | — |
| Package Type | LDCC (Leaded Ceramic Chip Carrier), plastic windowless | — |
| Propagation Delay | 25 ns | — |
| Frecuencia de reloj máxima | 50 MHz | — |
| Tensión de alimentación | 5 V nominal (4.75 V to 5.25 V) | — |
| Technology | CMOS, UV-erasable / OTP EPROM cell | — |
| Temperatura de funcionamiento | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature grade] |
| Programmable Memory | EPROM (one-time or UV-erasable) | — |
| Speed Grade | -1 | — |
| Estado RoHS | Non-compliant (ceramic LDCC with Pb-bearing terminations) | [DATA_NEEDED: RoHS status] |
| Logic Type | — | CPLD (Complex Programmable Logic Device) |
| Usable Gates | — | 3,750 |
| Logic Array Blocks (LABs) | — | 12 |
| User I/O Pins | — | 64 |
| Maximum Propagation Delay (tPD) | — | 40 ns |
| Maximum Frequency (fMAX) | — | 62.5 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Process Technology | — | CMOS, UV-erasable / OTP |
| Encapsulado | — | 100-pin Ceramic PGA (GC) |
| Tipo de montaje | — | Through-Hole (PGA) |
| Configuration Method | — | UV-Erase / One-Time Programmable |
| Interconnect | — | Peripheral Interconnect Array (PIA) |