EPM5192LC2 vs EPM5192LC-2 Comparación
Comparación detallada lado a lado de EPM5192LC2 por Intel y EPM5192LC-2 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5192LC2 | EPM5192LC-2 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $17,40 | $7,95 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (Erasable Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 192 | 192 |
| User I/O Pins | 64 | 64 |
| Logic Array Blocks (LABs) | 12 | 12 |
| Dedicated Inputs | 7 | — |
| External Clock Inputs | 1 | 1 |
| Propagation Delay (tpd) | 45 ns (LC-2 speed grade) | — |
| Frecuencia de reloj máxima | 50 MHz | — |
| Supply Voltage (VCC) | 5 V | — |
| Process Technology | CMOS | CMOS |
| Encapsulado | PQCC-84 (84-pin Plastic J-Lead Chip Carrier) | PQCC-84 (PLCC-84, J-lead, surface mount) |
| Tipo de montaje | Surface Mount | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: commercial/industrial/military grade] |
| Programmable Interconnect | Programmable Interconnect Array (PIA) | — |
| Reprogrammability | Windowed UV-erasable (ceramic package variants) / One-time programmable (plastic) | — |
| Dedicated Input Pins | — | 7 |
| Propagation Delay (tPD) | — | 45 ns (typical, -2 speed grade) |
| Maximum Internal Frequency | — | 50 MHz |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| Programming | — | Non-volatile (EPROM/EEPROM-based, in-system programmable via JTAG) |
| Tensión de alimentación | — | 5 V (typical MAX 5000 family) |
| Estado RoHS | — | [DATA_NEEDED: pre-RoHS legacy part — likely non-RoHS] |