EPM570GF100C5N vs EPM240GF100C5N Comparación
Comparación detallada lado a lado de EPM570GF100C5N por Altera y EPM240GF100C5N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM570GF100C5N | EPM240GF100C5N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $11,65 | $8,92 |
| Device Family | MAX II | — |
| Logic Elements | 570 | — |
| Macrocells | 440 | — |
| User I/Os | 76 | 80 |
| Propagation Delay (tPD) | 5.4 ns | — |
| Encapsulado | 100-LBGA (FBGA-100), 11 x 11 mm, 1.0 mm pitch | 100-ball FBGA (11 x 11 mm, 1.0 mm pitch) |
| Configuration Memory | On-chip Flash (non-volatile) | On-chip non-volatile Flash |
| Core Voltage | 1.8 V (internal) | — |
| I/O Voltage Support | 1.8 V / 2.5 V / 3.3 V (5.0 V tolerant inputs) | — |
| Temperatura de funcionamiento | -40C to +125C (industrial) | -40 C to +125 C |
| Tipo de montaje | Surface Mount | Surface Mount |
| Programming Interface | IEEE 1532 / JTAG (IEEE 1149.1) ISP | JTAG (IEEE 1149.1) / Jam STAPL |
| Estado RoHS | Compliant (lead-free) | Lead Free, RoHS compliant |
| Logic Family / Process | CMOS, Flash-based LUT | — |
| LABs | 4 (16 macrocells per LAB) | — |
| Family | — | MAX II |
| Logic Elements / Macro Cells | — | 192 macro cells |
| Pin-to-Pin Logic Delay (tPD) | — | 4.7 ns |
| Maximum Operating Frequency | — | 201.1 MHz |
| Logic Family | — | CMOS |
| Process Technology | — | 0.18 um |
| Core Supply Voltage (VCCINT) | — | 1.8 V |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| User Flash Memory | — | 8 Kbits |