EPM570GF100C5N vs EPM570F100C4N Comparación
Comparación detallada lado a lado de EPM570GF100C5N por Altera y EPM570F100C4N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM570GF100C5N | EPM570F100C4N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $11,65 | $14,32 |
| Device Family | MAX II | — |
| Logic Elements | 570 | 440 LE |
| Macrocells | 440 | 440 |
| User I/Os | 76 | — |
| Propagation Delay (tPD) | 5.4 ns | — |
| Encapsulado | 100-LBGA (FBGA-100), 11 x 11 mm, 1.0 mm pitch | 100-FBGA (FineLine BGA) 11 mm x 11 mm |
| Configuration Memory | On-chip Flash (non-volatile) | — |
| Core Voltage | 1.8 V (internal) | — |
| I/O Voltage Support | 1.8 V / 2.5 V / 3.3 V (5.0 V tolerant inputs) | — |
| Temperatura de funcionamiento | -40C to +125C (industrial) | 0 C to +85 C (commercial) |
| Tipo de montaje | Surface Mount | Surface Mount (BGA) |
| Programming Interface | IEEE 1532 / JTAG (IEEE 1149.1) ISP | — |
| Estado RoHS | Compliant (lead-free) | — |
| Logic Family / Process | CMOS, Flash-based LUT | — |
| LABs | 4 (16 macrocells per LAB) | — |
| Family | — | MAX II |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Maximum User I/O | — | 80 |
| Pin-to-Pin Delay (tPD1) | — | 5.4 ns |
| User Flash Memory | — | 4.4 Kbits |
| Configuration Technology | — | Flash (non-volatile, instant-on) |
| Operating Voltage (Core) | — | 3.3 V (internal regulator) |
| I/O Voltage Support (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| JTAG Support | — | Yes (IEEE 1149.1 boundary-scan) |
| Hot Socketing | — | Yes |