EPM570GM100C5N vs EPM570T100A5N Comparación
Comparación detallada lado a lado de EPM570GM100C5N por Intel y EPM570T100A5N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM570GM100C5N | EPM570T100A5N |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $10,40 | $6,72 |
| Family | MAX II | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 440 | — |
| User I/Os | 76 | — |
| Logic Elements | 440 | 570 |
| Número de pines | 100 | — |
| Package Type | Micro FBGA-100 (MBGA), 6 x 6 mm, 0.5 mm pitch | — |
| Pin-to-Pin Delay (tPD) | 5.4 ns | — |
| Maximum Frequency | 201.1 MHz | — |
| Temperatura de funcionamiento | -40C to +125C (industrial) | -40 °C to +125 °C (industrial) |
| Tensión de alimentación | 1.8 V core (MultiVolt I/O 1.5 V to 3.3 V) | — |
| Program Memory Type | Flash (non-volatile, in-system programmable) | — |
| Programming Interface | JTAG (IEEE 1149.1) | JTAG (IEEE 1149.1) - ISP |
| Tipo de montaje | Surface Mount | Surface Mount |
| Lead Free / RoHS | Yes / Compliant | — |
| Logic Family | CMOS | — |
| Device Family | — | MAX II |
| Macrocells | — | 440 |
| User I/O Pins | — | 76 |
| Number of Logic Array Blocks (LABs) | — | 57 |
| Encapsulado | — | 100-pin TQFP |
| Pin-to-Pin Logic Delay (tPD) | — | 5.4 ns |
| Maximum Internal Frequency | — | 304 MHz |
| Core Supply Voltage (VCCINT) | — | 1.8 V (typical) |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| User Flash Memory (UFM) | — | 8 Kbits |
| Configuration Memory | — | On-chip non-volatile flash |
| Estado RoHS | — | Compliant |