EPM570T100A5N vs EPM570GT100I5 Comparación
Comparación detallada lado a lado de EPM570T100A5N por Altera y EPM570GT100I5 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM570T100A5N | EPM570GT100I5 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $6,72 | $4,95 |
| Device Family | MAX II | — |
| Logic Elements | 570 | — |
| Macrocells | 440 | 440 |
| User I/O Pins | 76 | — |
| Number of Logic Array Blocks (LABs) | 57 | — |
| Encapsulado | 100-pin TQFP | 100-pin TQFP (14x14 mm, 0.5 mm pitch) |
| Pin-to-Pin Logic Delay (tPD) | 5.4 ns | — |
| Maximum Internal Frequency | 304 MHz | — |
| Core Supply Voltage (VCCINT) | 1.8 V (typical) | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| User Flash Memory (UFM) | 8 Kbits | — |
| Configuration Memory | On-chip non-volatile flash | — |
| Programming Interface | JTAG (IEEE 1149.1) - ISP | — |
| Temperatura de funcionamiento | -40 °C to +125 °C (industrial) | -40 C to +100 C (Industrial, "I5") |
| Tipo de montaje | Surface Mount | Surface Mount (Gull-wing leads) |
| Estado RoHS | Compliant | Compliant |
| Series | — | MAX II |
| Logic Elements (LE) | — | 570 |
| Maximum User I/O Pins | — | 76 |
| Propagation Delay (tPD) | — | 5.4 ns (typ) |
| Internal Supply Voltage (VCCINT) | — | 1.71 V to 1.89 V |
| User I/O Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| User Flash Memory | — | 8 Kbits |
| Programmability | — | In-System Programmable (ISP) via JTAG, non-volatile flash |
| Configuration Time | — | Instant-On (< 1 ms, no external PROM required) |
| Typical Active Current | — | [DATA_NEEDED: typical active ICC] |
| Speed Grade | — | GT (fast) |
| JTAG Support | — | IEEE 1149.1 boundary scan |
| Global Clock Networks | — | 4 |