EPM570T100I5 vs EPM570T100C5 Comparación
Comparación detallada lado a lado de EPM570T100I5 por Altera y EPM570T100C5 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM570T100I5 | EPM570T100C5 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $7,25 | $7,10 |
| Series | MAX II | MAX II |
| Family | EPM570 (MAX II) | MAX II CPLD |
| Logic Elements (LEs) | 570 | — |
| Equivalent Macrocells | 440 | — |
| User I/Os | 76 | — |
| Propagation Delay (tPD) | 5.4 ns | — |
| User Flash Memory (UFM) | 8 Kbits | — |
| Process Technology | 0.18 micron, 6-layer-metal flash | 0.18 µm |
| Encapsulado | TQFP-100 (14x14x1 mm) | TQFP-100 (14x14 mm) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Temperatura de funcionamiento | -40C to +100C (industrial) | 0°C to 85°C (TJ) |
| Core Supply Voltage | 3.0 V to 3.6 V | — |
| I/O Standards Supported | 1.5V / 1.8V / 2.5V / 3.3V LVCMOS/LVTTL | — |
| Programming Interface | JTAG (IEEE 1149.1), in-system programmable | JTAG (IEEE 1149.1) ISP |
| Configuration Method | Non-volatile flash, instant-on | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance] | Compliant |
| Logic Elements | — | 570 |
| Macrocells | — | 440 |
| Maximum User I/O Pins | — | 76 |
| Propagation Delay (tpd) | — | 5.4 ns (max) |
| Maximum Frequency | — | 201.1 MHz |
| Internal Supply Voltage | — | 2.5 V / 3.3 V |
| I/O Voltage Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| User Flash Memory | — | 8 Kbits |