EPM570ZM144C6N vs EPM570ZM100C6N Comparación
Comparación detallada lado a lado de EPM570ZM144C6N por Altera y EPM570ZM100C6N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM570ZM144C6N | EPM570ZM100C6N |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $7,85 | $14,98 |
| Manufacturer | Intel (formerly Altera) | — |
| Family | MAX II | — |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Logic Elements | 570 LEs (440 equivalent macrocells) | — |
| User I/Os | 76 (in 144-MBGA package) | 76 |
| Maximum Internal Frequency | 184.1 MHz | — |
| Core Voltage | 1.8 V | — |
| I/O Voltage Support | 1.5 V, 1.8 V, 2.5 V, 3.3 V (MultiVolt) | — |
| Process Technology | 0.18 µm 6-layer-metal flash | 0.18 µm 6-layer-metal flash |
| User Flash Memory (UFM) | 8 Kbits | 8 Kbits |
| Programmability | In-system programmable via JTAG (ISP) | — |
| Configuration Memory | Non-volatile flash | — |
| Encapsulado | 144-ball Micro FBGA (ZM144), 6 x 6 mm, 0.5 mm pitch | 100-ball FineLine BGA (6x6 mm, 0.5 mm pitch) |
| Temperatura de funcionamiento | -40 °C to +125 °C (industrial) | -40 °C to +125 °C (industrial) |
| Estado RoHS | Lead-free compliant | — |
| Series | — | MAX II |
| Device Family | — | EPM570 (MAX II Z) |
| Logic Elements (LEs) | — | 570 |
| Equivalent Macrocells | — | 440 |
| Propagation Delay (tPD) | — | 9 ns |
| Internal Supply Voltage (VCCINT) | — | 1.71 V to 1.89 V |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Programmable Type | — | In System Programmable (Flash) |
| Tipo de montaje | — | Surface Mount |
| Nivel MSL | — | 3 |
| Lead Free / RoHS | — | Lead Free, RoHS Compliant |
| Design Software | — | Altera Quartus II |
| JTAG Standard | — | IEEE Std 1149.1 / IEEE 1532 |