EPM7128AELC84-10N vs EPM7128ELC84-10 Comparación
Comparación detallada lado a lado de EPM7128AELC84-10N por Intel y EPM7128ELC84-10 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EPM7128AELC84-10N - MAX 7000A CPLD, 128 Macro, 10ns, 84-PLCC | Intel
EPM7128AELC84-10N ✓ ActivoComparación de especificaciones
| Parámetro | EPM7128AELC84-10N | EPM7128ELC84-10 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $10,45 | $7,20 |
| Family | MAX 7000A | MAX 7000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 128 | — |
| Usable Gates | 2,500 | — |
| Propagation Delay (tPD) | 10 ns | — |
| User I/O Pins | 68 | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| Maximum Internal Frequency (fCNT) | 147.1 MHz | — |
| Process Technology | 0.30 µm CMOS EEPROM | — |
| In-System Programmability | Yes (JTAG IEEE 1149.1) | — |
| MultiVolt I/O Interface | 2.5 V / 3.3 V / 5 V mixed | — |
| Temperatura de funcionamiento | 0C to +70C (commercial) | 0C to +70C (Commercial) |
| Encapsulado | 84-pin PLCC (J-Lead) | 84-pin PLCC (J-Lead) |
| Tipo de montaje | Surface Mount / Through-Hole socket | Surface Mount / Socket |
| Estado RoHS | Compliant | [DATA_NEEDED: RoHS status from datasheet] |
| Configuration Memory | Non-volatile EEPROM | — |
| Power-Up Speed | Instant-on (no boot PROM required) | — |
| Macrocells | — | 128 |
| Equivalent Logic Gates | — | [DATA_NEEDED: equivalent gate count from datasheet] |
| User I/Os | — | 68 |
| Dedicated Inputs | — | 12 |
| Operating Voltage (VCCINT/VCClO) | — | 5 V |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Counter Frequency (fCNT) | — | [DATA_NEEDED: fCNT from datasheet] |
| Technology | — | EEPROM-based CMOS |
| Programming Interface | — | IEEE 1149.1 (JTAG) ISP |
| In-System Programmable | — | Yes |
| Lead-Free | — | [DATA_NEEDED: lead-free status from datasheet] |