EPM7128AETC100-7N vs EPM7128STC100-7 Comparación
Comparación detallada lado a lado de EPM7128AETC100-7N por Altera y EPM7128STC100-7 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM7128AETC100-7N | EPM7128STC100-7 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $31,80 | $8,20 |
| Family | MAX 7000A | — |
| Device Type | CPLD - Complex Programmable Logic Device | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 128 | 128 |
| Usable Gates | 2,500 | 2,500 |
| Logic Array Blocks (LABs) | 4 | 8 |
| User I/Os | 84 | 84 |
| Propagation Delay (tpd) | 7.5 ns | — |
| Counter Frequency (max) | 129.9 MHz | — |
| Internal Frequency (max) | 250 MHz | — |
| Core Supply Voltage | 3.3 V | — |
| Logic Family | CMOS | CMOS |
| Recuento de pines | 100 | — |
| Encapsulado | 100-TQFP | 100-Pin TQFP (TQFP-100) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Temperatura de funcionamiento | 0 C to +70 C (Commercial) | 0C to +70C (Commercial) |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs status] |
| Process Technology | 0.30 µm EEPROM CMOS | — |
| Series | — | MAX 7000S |
| Propagation Delay (tPD) | — | 7.5 ns |
| Internal Frequency | — | 125 MHz |
| Supply Voltage (VCCINT) | — | 5 V |
| Programmable Pin Count | — | 100 |
| In-System Programmability | — | Yes (JTAG IEEE 1149.1) |
| Configuration Memory | — | EEPROM (non-volatile) |