EPM7128ATC100-10 vs EPM7128SQC100-10F Comparación
Comparación detallada lado a lado de EPM7128ATC100-10 por Altera y EPM7128SQC100-10F por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EPM7128ATC100-10 - MAX 7000A CPLD, 128 Macrocells, 10ns TQFP-100 | Altera
EPM7128ATC100-10 ObsoleteAltera
EPM7128SQC100-10F - 128-Macrocell MAX 7000 CPLD, 10ns, 100-PQFP | Altera (Intel)
EPM7128SQC100-10F ✓ ActivoComparación de especificaciones
| Parámetro | EPM7128ATC100-10 | EPM7128SQC100-10F |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $4,95 | $4,95 |
| Product Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Family | MAX 7000A | MAX 7000S |
| Architecture | Multiple Array MatriX (MAX) | — |
| Macrocells | 128 | 128 |
| Logic Array Blocks (LABs) | 4 | 8 |
| Usable Gates | 2.5K | 2,500 |
| User I/O Pins | 68 | — |
| Pin-to-Pin Logic Delay | 4.5 ns | — |
| Counter Frequency (max) | 227.3 MHz | — |
| Speed Grade | -10 (10 ns) | — |
| Core Supply Voltage | 3.3 V | — |
| I/O Logic Level Support | 5.0 V / 3.3 V / 2.5 V (MultiVolt) | — |
| Program Memory | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Encapsulado | 100-pin TQFP (TC100) | 100-pin PQFP (Plastic Quad Flat Pack) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Temperatura de funcionamiento | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Estado RoHS | [DATA_NEEDED: RoHS compliance] | Compliant (F suffix variant) |
| User I/Os | — | 84 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Counter Frequency | — | 100 MHz |
| Supply Voltage (VCCINT) | — | 5 V |
| Process Technology | — | CMOS EEPROM |
| Programmability | — | In-System Programmable (ISP) via JTAG (IEEE 1149.1) |
| Lead-Free (F suffix) | — | Yes (Pb-free finish) |