EPM7128SLC84-10 vs EPM7128ELC84-12 Comparación
Comparación detallada lado a lado de EPM7128SLC84-10 por Intel y EPM7128ELC84-12 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM7128SLC84-10 | EPM7128ELC84-12 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $9,75 | $10,40 |
| Family | MAX 7000S | MAX 7000 (MAX 7000E series) |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 128 | 128 |
| Logic Gates | 2500 | — |
| User I/Os | 68 | 84 |
| Total Package Pins | 84 | — |
| Encapsulado | PLCC-84 (J-lead) | 84-pin PLCC (J-Lead, QCCJ) |
| Propagation Delay (tpd) | 10 ns | — |
| Maximum Operating Frequency | 125 MHz | — |
| Internal Frequency | 250 MHz | — |
| Supply Voltage (VCCINT) | 5 V | — |
| MultiVolt I/O Support | 2.5 V / 3.3 V / 5 V | — |
| Program Memory Type | EEPROM (in-system programmable) | — |
| JTAG (IEEE 1149.1) | Yes | — |
| Temperatura de funcionamiento | 0C to +70C (Commercial) | 0C to +70C (commercial) |
| Tipo de montaje | Surface Mount (J-bend) | Surface Mount (PLCC socket compatible) |
| Nivel MSL | [DATA_NEEDED: MSL level] | — |
| Estado RoHS | Non-compliant (contains lead in PLCC) | Non-compliant (legacy 5V part, SnPb finish) |
| Logic Family | — | CMOS, EEPROM-based |
| Usable Gates | — | 2,500 |
| Logic Array Blocks (LABs) | — | 8 |
| Propagation Delay (tpd1) | — | 12 ns |
| Internal Global Clock Frequency | — | 90.9 MHz |
| Setup Time | — | 4.5 ns |
| Supply Voltage (VCCINT / VCCIO) | — | 5 V (4.75 V to 5.25 V) |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |
| Recuento de pines | — | 84 |