EPM7128SLC84-7N vs EPM7128ELC84-12 Comparación
Comparación detallada lado a lado de EPM7128SLC84-7N por Intel y EPM7128ELC84-12 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM7128SLC84-7N | EPM7128ELC84-12 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $8,75 | $10,40 |
| Series | MAX 7000S | — |
| Programmable Type | In System Programmable (ISP) | — |
| Tipo de memoria | EEPROM | — |
| Number of Macrocells | 128 | — |
| Number of Logic Elements/Blocks | 8 (Logic Array Blocks) | — |
| Number of Usable Gates | 2,500 | — |
| Number of I/O Pins | 68 | — |
| Propagation Delay (tpd) Max | 7.5 ns | — |
| Maximum Operating Frequency | 125 MHz | — |
| Counter Speed (Internal) | up to 175.4 MHz (family max) | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V (5 V nominal) | — |
| Temperatura de funcionamiento | 0 C to +70 C (Commercial) | 0C to +70C (commercial) |
| Encapsulado | 84-LCC (J-Lead), PLCC-84 | 84-pin PLCC (J-Lead, QCCJ) |
| Tipo de montaje | Surface Mount | Surface Mount (PLCC socket compatible) |
| Nivel MSL | [DATA_NEEDED: MSL level] | — |
| Estado RoHS | Compliant (lead-free 'N' suffix) | Non-compliant (legacy 5V part, SnPb finish) |
| Family | — | MAX 7000 (MAX 7000E series) |
| Logic Family | — | CMOS, EEPROM-based |
| Usable Gates | — | 2,500 |
| Macrocells | — | 128 |
| Logic Array Blocks (LABs) | — | 8 |
| User I/Os | — | 84 |
| Propagation Delay (tpd1) | — | 12 ns |
| Internal Global Clock Frequency | — | 90.9 MHz |
| Setup Time | — | 4.5 ns |
| Supply Voltage (VCCINT / VCCIO) | — | 5 V (4.75 V to 5.25 V) |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |
| Recuento de pines | — | 84 |