EPM7128SQC100-10 vs EPM7128AEFC100-5 Comparación
Comparación detallada lado a lado de EPM7128SQC100-10 por Altera y EPM7128AEFC100-5 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM7128SQC100-10 | EPM7128AEFC100-5 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $9,85 | $79,50 |
| Family | MAX 7000S | MAX 7000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 128 | — |
| Logic Elements / Gates | 2,500 usable gates | — |
| Maximum User I/O | 84 | — |
| Logic Array Blocks (LABs) | 16 | — |
| Maximum Operating Frequency | 100 MHz | — |
| Pin-to-Pin Logic Delay (tPD) | 10 ns | — |
| Tensión de alimentación | 5 V | 3.3 V |
| Process Technology | 5V CMOS, EEPROM-based | — |
| Programmability | In-System Programmable (ISP) via JTAG | — |
| Encapsulado | 100-pin PQFP (Plastic Quad Flat Pack) | 100-ball FBGA (FineLine BGA) |
| Temperatura de funcionamiento | 0C to +70C (commercial) | 0C to +70C (Commercial) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Estado RoHS | [DATA_NEEDED: rohs_status] | [DATA_NEEDED: RoHS status] |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Family / Base Number | — | EPM7128A |
| Macrocells | — | 128 |
| Usable Gates | — | 2,500 |
| Propagation Delay (tPD) | — | 5 ns |
| Internal Frequency (fMAX) | — | 192.3 MHz |
| User I/Os | — | 84 |
| Logic Family | — | CMOS |
| Recuento de pines | — | 100 |
| Programmable Type | — | EEPROM (In-System Programmable) |
| JTAG Support | — | Yes (IEEE 1149.1 Boundary Scan) |