EPM7128SQI100-10 vs EPM7128SQI100-10N Comparación
Comparación detallada lado a lado de EPM7128SQI100-10 por Altera y EPM7128SQI100-10N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EPM7128SQI100-10 - MAX 7000S CPLD 128-Macrocell 84-IO 10ns | Altera
EPM7128SQI100-10 ObsoleteIntel
EPM7128SQI100-10N - 128-Macrocell MAX 7000S CPLD, 10ns, PQFP-100 | Intel / Altera
EPM7128SQI100-10N NrndComparación de especificaciones
| Parámetro | EPM7128SQI100-10 | EPM7128SQI100-10N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $9,75 | $15,90 |
| Family | MAX 7000S | MAX 7000S |
| Device Type | CPLD - Complex Programmable Logic Device | CPLD - Complex Programmable Logic Device |
| Macro Cells | 128 | — |
| User I/Os | 84 | — |
| Usable Gates | 2,500 | 2,500 (up to 5,000 usable in family) |
| Logic Blocks (LABs) | 8 (16 macrocells each) | — |
| Package Type | PQFP-100 | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Internal Frequency | 125 MHz to 250 MHz | — |
| Counter Speed | Up to 175.4 MHz | — |
| Operating Voltage (VCC) | 5 V | — |
| Temperatura de funcionamiento | -40C to +85C (Industrial) | -40C to +85C (Industrial grade, 'I' suffix) |
| Configuration Memory | EEPROM (non-volatile) | — |
| Program/Erase Cycles | 100 minimum | — |
| In-System Programming | Yes (JTAG IEEE 1149.1) | — |
| Logic Family | CMOS | — |
| I/O Compatibility | TTL-compatible, 5V/3.3V multi-voltage | — |
| Estado RoHS | [DATA_NEEDED: RoHS status not in provided data] | — |
| Macrocells | — | 128 |
| Logic Array Blocks (LABs) | — | 4 |
| Maximum User I/Os | — | 84 |
| Pin-to-Pin Logic Delay (tPD) | — | 10 ns |
| Maximum Operating Frequency | — | 100 MHz |
| Counter Frequency (family max) | — | 175.4 MHz |
| Supply Voltage - Core (VCCINT) | — | 5.0 V |
| Supply Voltage - I/O (VCCIO) | — | 2.5 V / 3.3 V / 5.0 V (multiVolt) |
| Technology | — | CMOS, EEPROM-based configuration |
| Encapsulado | — | 100-pin PQFP (Plastic Quad Flat Pack) |
| Tipo de montaje | — | Surface Mount |
| Programming Interface | — | JTAG (IEEE Std. 1149.1) / ByteBlaster |
| RoHS Compliance | — | Compliant (lead-free, 'N' suffix) |