EPM7128STC100-6 vs EPM7128STC100-7 Comparación
Comparación detallada lado a lado de EPM7128STC100-6 por Intel y EPM7128STC100-7 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM7128STC100-6 | EPM7128STC100-7 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $5,20 | $8,20 |
| Family | MAX 7000S | — |
| Macrocells | 128 | — |
| Equivalent Gates | 2,500 | — |
| User I/O Pins | 84 | — |
| Pin-to-Pin Delay (tPD) | 6 ns | — |
| Maximum Internal Frequency (fCNT) | 147.1 MHz | — |
| Supply Voltage (VCCINT / VCCIO) | 5 V | — |
| Encapsulado | 100-pin TQFP (STC100) | 100-Pin TQFP (TQFP-100) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE Std. 1149.1) / ISP | — |
| Temperatura de funcionamiento | 0C to +70C (commercial) | 0C to +70C (Commercial) |
| PCI Compliance | 33 MHz PCI Local Bus Rev. 2.2 (-6/-7/-10 grades) | — |
| Lead Pitch | 1.0 mm (TQFP) | — |
| Lead-Free / RoHS | Contains lead (non-RoHS original; -6N variant is lead-free) | — |
| Configuration Memory | On-chip EEPROM (non-volatile) | EEPROM (non-volatile) |
| Series | — | MAX 7000S |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 128 |
| Usable Gates | — | 2,500 |
| Logic Array Blocks (LABs) | — | 8 |
| User I/Os | — | 84 |
| Propagation Delay (tPD) | — | 7.5 ns |
| Internal Frequency | — | 125 MHz |
| Supply Voltage (VCCINT) | — | 5 V |
| Logic Family | — | CMOS |
| Programmable Pin Count | — | 100 |
| In-System Programmability | — | Yes (JTAG IEEE 1149.1) |
| Estado RoHS | — | [DATA_NEEDED: rohs status] |