EPM7160SLC84-10 vs EPM7128ELC84-10 Comparación
Comparación detallada lado a lado de EPM7160SLC84-10 por Altera y EPM7128ELC84-10 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM7160SLC84-10 | EPM7128ELC84-10 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $35,77 | $7,20 |
| Family | MAX 7000S | MAX 7000 |
| Macrocells | 160 | 128 |
| Logic Array Blocks (LABs) | 4 | — |
| Maximum User I/O Pins | 64 | — |
| Usable Gates | 3,200 | — |
| Propagation Delay (tPD) | 10 ns | — |
| Maximum Operating Frequency | 100 MHz | — |
| Supply Voltage (VCCINT/VCCIO) | 5.0 V | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG, 5.0 V) | — |
| Technology | EEPROM-based CMOS | EEPROM-based CMOS |
| Encapsulado | 84-Pin PLCC (J-Lead) | 84-pin PLCC (J-Lead) |
| Tipo de montaje | Surface Mount | Surface Mount / Socket |
| Temperatura de funcionamiento | 0C to +70C (Commercial) | 0C to +70C (Commercial) |
| JTAG Boundary Scan | Yes (IEEE Std. 1149.1 compliant) | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status from datasheet] |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Equivalent Logic Gates | — | [DATA_NEEDED: equivalent gate count from datasheet] |
| User I/Os | — | 68 |
| Dedicated Inputs | — | 12 |
| Operating Voltage (VCCINT/VCClO) | — | 5 V |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Counter Frequency (fCNT) | — | [DATA_NEEDED: fCNT from datasheet] |
| Programming Interface | — | IEEE 1149.1 (JTAG) ISP |
| In-System Programmable | — | Yes |
| Lead-Free | — | [DATA_NEEDED: lead-free status from datasheet] |